Because so many people use consumer electronics, the automation of the analogue design process for integrated circuits (ICs) has become unavoidable. This is because of the widespread use of consumer electronics. This is due to the fact that consumer electronics are utilised in such a widespread manner. As a result of this, a sizeable portion of the overall length of time required to get a product to market can be reduced. This article introduces a totally new technique for automatically scaling the components of CMOS analogue circuits, and it does so in a very straightforward manner. At the very end of the paper is where you’ll find the tool. This tool makes use of an unusual combination of an optimization method known as SCAmGWO, which is a modified version of the grey wolf optimization algorithm, and the sine-cosine optimization algorithm. This combination is used during the optimization phase of the automation process. CADENCE is a tool that is used for accurate model simulation, and MATLAB is a tool that is used for optimising parameters by utilising the results from CADENCE. The tool that is being suggested is one that optimises parameters by using the results from CADENCE. This iterative process of optimization takes place in a loop. After the model has been simulated with CADENCE, the results of the simulation are imported into MATLAB in order to optimise the parameters of the model. A variety of different benchmark functions, in addition to being compared to algorithms developed by other researchers, are used in order to evaluate the efficacy of the proposed algorithm. This is done in addition to comparing the proposed algorithm to algorithms developed by other researchers. A comprehensive performance evaluation is also carried out, which consists of more than 20 individual runs in addition to a Wilcoxon rank-sum test. This evaluation is carried out. The findings of this evaluation are given careful consideration and analysis. The effectiveness of the proposed algorithm is evaluated in comparison to that of a traditional operational amplifier that is made up of two stages. The results of this comparison will serve as a benchmark for evaluating the algorithm’s overall performance. The operational amplifier that was developed in the CADENCE design environment makes use of the aspect ratios that were derived from the simulation performed by the MATLAB programme using the 180 nm CMOS standard process. With the assistance of the CADENCE design environment, this simulation was successfully completed. It was decided to make use of this technology because it is considered to be the best CMOS technology currently available. The exploration and exploitation ability of the hybrid algorithm is increased by adapting the advantages of two algorithms, namely the sine-cosine algorithm and the modified grey wolf optimization algorithm. These are the algorithms that are responsible for the exploration and exploitation ability of the hybrid algorithm. These are the algorithms that are in charge of the ability of the hybrid algorithm to explore and exploit new territory. The hybrid algorithm utilises these other approaches in addition to its own capabilities. In addition to this, in order to provide evidence of the seriousness of the issue, a statistical analysis that is comprised of twenty separate runs is carried out. The practicability of the solution can be inferred from an investigation into how it fares in relation to the performance of other measuring devices that are currently on the market and are comparable to it in some way. The immutability of the design that was obtained with the SCAmGWO approach is shown even further through the utilisation of Monte Carlo simulation and corner analysis. This was accomplished with the help of the SCAmGWO method.